OMMIC consits of 5 main buildings with 1500 m² of clean rooms with an ISO 5 and ISO 3 which are fully devoted to III-V IC development and fabrication. Our wafers are delivered with electrical properties guaranteed by the measurement of specific test modules added on the mask set, named PCM (Process Control Monitor). Our processes and our equipments are also followed with SPC (Statistical Process Control).
In 2017, OMMIC inaugurated its new production clean room of 800 m² which allowed from the first months to multiply the volume of production by 2 and eventually by 7 in connection with the hiring plan and therefore to address the high volume market of 5G.
This market will represent a production of more than 2 million chips per year.
At OMMIC, we have a powerful R&D department developing our own processes starting from epitaxial structure. We have a number of MOCVD reactors and supply epi wafers in 3-inch, 4-inch and 6-inch.
OMMIC has 4 epitaxy reactors and develops its own epi structure.
OMMIC uses E-Beam lithography to define gates as small as 40 nm.
OMMIC produces in France, near Paris. The company has a 3-inch and 6-inch Fab line.
OMMIC tests 100% of the dies it produces. This includes RF and DC tests.
This step is done within OMMIC in the back-end clean room.
OMMIC visual inspects 100% of the dies with commercial and space grade screening.
Designed by OMMIC design team or by our customer.
Discover our clean rooms and the work of our technicians and operators by seeing this video.